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Why Do SiC Epitaxial Wafers Have Pit Defects?

published on 12 Aug 2024

Silicon carbide (SiC) is a crucial wide-bandgap semiconductor material, widely used in high-temperature, high-frequency, and high-power electronic devices. However, during the production of SiC epitaxial wafers, the presence of pit defects significantly impacts surface quality and device performance. Understanding and controlling the mechanisms behind these defects is essential for improving the quality of SiC epitaxial wafers.


Analysis of the Causes of Pit Defects


1. Influence of Intrinsic Crystal Defects


One of the primary contributors to pit defects in SiC epitaxial layers is the presence of screw dislocations, which are common intrinsic defects in SiC materials. During epitaxial growth, screw dislocations often extend to the surface of the epitaxial layer, potentially causing local variations in the growth rate, leading to the formation of pits. Additionally, the step edge effect is another significant factor. Near screw dislocations and other dislocations, the lattice distortion can cause localized differences in growth rates, resulting in the formation of pit defects in the epitaxial layer.


2. Control of Epitaxial Growth Conditions


The uniformity of the growth rate during epitaxial growth directly affects the quality of the SiC epitaxial layer. If the gas flow distribution in the chemical vapor deposition (CVD) system is uneven, if the supply of reactant gases is unstable, or if there are issues with the temperature gradient within the reaction chamber, localized variations in growth rates may occur, leading to the formation of pits in the epitaxial layer. Additionally, if there are impurities such as oxygen or carbon in the growth environment, they can react with the growth surface, causing non-uniform growth rates and thus inducing pit defects.


3. Quality of the Substrate Material


The quality of the SiC substrate material is crucial for controlling defects in the epitaxial layer. The surface roughness of the substrate directly impacts the surface quality of the epitaxial layer. If the substrate surface has mechanical damage or rough regions, these defects may be amplified during epitaxial growth, leading to pit formation in the epitaxial layer. Furthermore, intrinsic defects in the substrate, such as dislocations or scratches, can be replicated in the epitaxial layer during growth, resulting in pit defects.


4. Other Factors


In addition to the aforementioned factors, equipment-related issues can also contribute to the formation of pit defects. For example, aging of quartz tubes or crucibles in the CVD equipment may lead to uneven evaporation of silicon and carbon sources, resulting in localized differences in growth rates and pit formation. Additionally, due to the difference in thermal expansion coefficients between the substrate and the epitaxial layer, thermal stress may develop during the epitaxial growth process, and the concentration of this stress can induce pit defects.


Conclusion


Pit defects in SiC epitaxial wafers are caused by a complex interplay of various factors, including intrinsic crystal defects, epitaxial growth conditions, substrate material quality, and equipment factors. To control these defects, efforts should focus on optimizing the epitaxial growth process and equipment, improving the quality of substrate materials, and strictly controlling the purity of the growth environment. Through comprehensive improvements in these areas, it is possible to significantly reduce pit defects in SiC epitaxial wafers, thereby enhancing their performance in high-end electronic devices.


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